KUET Institutional Repository

Capacitance-Voltage Characterization of Ultra Scaled XOI FET: An Analytical Approach

Show simple item record

dc.contributor.advisor Islam, Dr. Md. Rafiqul
dc.contributor.author Islam, Muhammad Mainul
dc.date.accessioned 2018-05-18T11:26:00Z
dc.date.available 2018-05-18T11:26:00Z
dc.date.copyright 2017
dc.date.issued 2017-07
dc.identifier.other ID 0000000
dc.identifier.uri http://hdl.handle.net/20.500.12228/107
dc.description This thesis is submitted to the Department of Electrical and Electronic Engineering, Khulna University of Engineering & Technology in partial fulfillment of the requirements for the degree of Master of Science in Electrical and Electronic Engineering, July 2017. en_US
dc.description Cataloged from PDF Version of Thesis.
dc.description Includes bibliographical references (pages 51-58).
dc.description.abstract Device scaling is the key factor that drives the microelectronics revolution as described by Moore’s law. Reduction of the physical MOS device dimensions has been proved beneficial in terms of circuit speed, cost and power consumption. But the continued miniaturization of the MOS transistor imposes a lot of challenges in terms of device design. Addressing to this issue “Compound semiconductor-on-insulator” was reported in 2010, which is also termed as XOI. III-V materials can be considered as the perfect replacement of silicon as the channel material in MOS devices due to their excellent transport properties. It is well established that the capacitance – voltage (C-V) measurement is widely accepted technique for different device parameter extraction and also to measure the interface quality of a fabricated MOSFET. An analytical model is developed here using quantum mechanical approach to explain the C-V characteristics of XOI FET by solving coupled Schrodinger- Poisson equation. It is found that the energy quantization effect in such short channel device causes a unique staircase nature in the C-V characteristics for channel thickness up to 20nm. Beyond that this nature disappear reproducing traditional C-V characteristics of SOI FET. It is also seen that channel thickness and dopant impurity has an impact on the shift of C-V curve. The threshold voltage of such devices is found higher at reduced channel thickness. en_US
dc.description.statementofresponsibility Muhammad Mainul Islam
dc.format.extent 58 pages
dc.language.iso en_US en_US
dc.publisher Khulna University of Engineering & Technology (KUET), Khulna, Bangladesh. en_US
dc.rights Khulna University of Engineering & Technology (KUET) thesis/dissertation/internship reports are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission.
dc.subject Device scaling en_US
dc.subject Compound semiconductor-on-insulator en_US
dc.title Capacitance-Voltage Characterization of Ultra Scaled XOI FET: An Analytical Approach en_US
dc.type Thesis en_US
dc.description.degree Master of Science in Electrical and Electronic Engineering
dc.contributor.department Department of Electrical and Electronic Engineering


Files in this item

This item appears in the following Collection(s)

Show simple item record

Search KUET IR


Browse

My Account

Statistics